AI for photonics & integrated photonic design

Junho Park

Second-year Ph.D. student NSF GRFP Fellow

I am a second-year Ph.D. student in Electrical & Computer Engineering at the University of Michigan, advised by Prof. Di Liang in the Large Scale Integrated Photonics Lab, and an NSF Graduate Research Fellow.

My research focuses on AI for photonics, including agentic photonic integrated circuit (PIC) design and inverse design for integrated photonics. I combine generative priors, physics-based optimization, and interpretable design tools to make the path from device specifications to fabrication-aware layouts more efficient and automated.

Previously, I studied Electrical Engineering & Computer Science and Materials Science & Engineering at UC Berkeley, graduating with EECS Honors. I have also worked at Apple, Amazon Web Services, and STMicroelectronics.

Portrait of Junho Park

Ann Arbor, Michigan

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Research

Selected publications

All publications
  1. Illustration of geometry sensitivity in an inverse-designed photonic splitter
    APL Engineering Physics Editor’s Pick

    Interpretable geometry sensitivity for inverse design of integrated photonics

    Junho Park*, Taehan Kim*, Mohammad Ali, and Di Liang
    APL Engineering Physics, 2026

    Integrated Gradients maps pixel-level geometry sensitivity in inverse-designed photonic devices, with experiments confirming that identified hotspots are more vulnerable to fabrication perturbations.

    DOI Paper
  2. Learned generative prior and sample silicon splitter layouts from the paper’s workflow figure
    IEEE Photonics Conference Oral

    A Generative Prior-Guided Faster Inverse Design Framework for High-Quality Integrated Photonics

    Junho Park*, Taehan Kim*, Mohammad Ali, SooHyuk Cho, and Di Liang
    In IEEE Photonics Conference (IPC), 2026

    Generative priors improve performance, manufacturability, and optimization speed in fabricated silicon power splitters.

    Conference PDF
  3. OPA-cleaned wavelength demultiplexer with red boxes identifying trimmed peripheral regions
    IEEE Photonics Conference Oral

    Solver-Native Adjoint Attribution for Trimming Inverse-Designed Photonic Layouts

    Junho Park*, Taehan Kim*, and Di Liang
    In IEEE Photonics Conference (IPC), 2026

    Solver-native attribution identifies low-impact silicon for trimming while preserving simulated optical performance.

    Conference PDF
  4. Scanning electron micrograph of a bottom-up-grown III-nitride photonic circuit with a grating-coupler inset
    CLEO

    Etch-Free Integrated III-Nitride Photonics via Bottom-Up Selective-Area Growth

    Minming He, Junho Park, Yifu Guo, Omar Alkhazragi, Jiangnan Liu, Liangqing Cui, Theodore Norris, Zetian Mi, and Di Liang
    In Conference on Lasers and Electro-Optics (CLEO), 2026

    Bottom-up selective-area growth creates GaN waveguides, microring resonators, and grating couplers with crystallographic sidewalls, avoiding plasma damage from conventional device etching.

    DOI Paper PDF
  5. Schematic of a multicolored light-emitting array for compressive spectroscopy

    Cropped from Fig. 1A, Wang et al., Science Advances (2023). CC BY-NC 4.0.

    Science Advances

    Highly multicolored light-emitting arrays for compressive spectroscopy

    Vivian Wang, Shiekh Zia Uddin, Junho Park, and Ali Javey
    Science Advances, 2023

    A chip with 49 individually addressable emission colors enables compact spectroscopy and spectral imaging through compressive reconstruction without diffractive optics.

    Paper

* Equal contribution.